1. Field of the Invention
The present invention relates to a heterojunction bipolar transistor (HBT) having low resistance and improved current gain properties by having a planar doping sheet included at some point between the collector layer and the substrate layer.
2. Brief Description of Art
Compound semiconductor devices such as HBTs are used extensively in high frequency applications where high speed device operation is essential. In compound semiconductor devices, large electron mobility, which is pertinent to compound semiconductor materials, facilitates the high speed operation of the device substantially. Generally, HBTs include a heterojunction interface of InGaP or Al GaAs with GaAs in the essential part of the device.
FIG. 1 shows a typical epitaxial layer structure for an HBT. A buffer layer 11 of undoped GaAs is provided on a semi-insulating GaAs substrate 10, followed by a n-type GaAs (e.g. heavily Si-doped) sub-collector layer 12. This is followed by a collector layer of GaAs collector layer 13 on the sub-collector layer. Next, a base layer 14 of p-type GaAs (e.g., GaAs doped with C) is grown on the collector layer 13, and an emitter layer 15 of n-type InGaP (e.g. InGaP doped with Si). This emitter layer 15, thus formed, in turn, is covered with an n-doped GaAs (e.g., GaAs doped with Si) emitter cap layer 16. The final layer is an n-type InGaAs contact layer 17 (e.g., InGaAs doped with Si). Thereby, a layered semiconductor body including the semiconductor layers 11-17 on the substrate 10 is obtained. It should be noted that the deposition of the layers 11-17 is achieved consecutively one after another by employing a vapor phase deposition process such as a MOVPE process.
After the formulation of layers 11-17, this layered semiconductor body as such is subjected to an etching process for partially removing the contact layer 17, emitter cap layer 16, the emitter layer 15, the base layer 13, and the collector layer so that a part of the sub-collector layer 12 and part of base layer 14 are exposed. FIG. 2 shows that by providing ohmic electrodes 18, 19, and 20, respectively, on the contact layer, the exposed surface of the base layer and the exposed surface of the sub-collector layer 12, the fabrication of the HBT is completed.
While advances in HBT fabrication have improved performance, there is still a need for even better performing HBT devices. For example, in an HBT, it is advantageous to have a very heavily doped sub-collector layer since this reduces resistive losses and thereby increases the efficiency of HBT power amplifier circuits. Typically, Si is used as an n-type dopant in the sub-collector layer; however, as the Si doping concentration is increased beyond 3×1018 cm−3, the performance of the HBT is negatively impacted. Specifically, as the resistivity of the sub-collector drops because of an increase in Si doping, the current gain is reduced by factors of two or more. This reduction of current gain will negatively impact circuit performance and may also have adverse effects on the long term HBT device reliability.